Micrel, Inc.
Timing Diagrams
t HOON
30ns
60ns
t HOOFF
45ns
70ns
MIC4102
HO
4
t LOON
30ns
6
LO
2
70ns
3. V LOOFF <1.7V
8
10
Switch node
(HS Pin)
7. V SWth <(VDD-2.5V)
PWM
t LOOFF
30ns
60ns
1
5
t LSOFF
36ns
7 0ns
9
LS
Time Point Action
1-2
2-4
PWM signal goes high. This initiates the LO
signal to go low. The delay between PWM high to
(V LO –10%) is typically 30ns (t LOOFF )
LO goes low. When LO reaches 1.7V (V LOOFF ) the
low side MOSFET is deemed to be off. The high
because it is possible to have the SW node
oscillate, and could easily bounce through 10V
level. If the LO high transition has not happened
within 250ns, it is forced to happen, unless the LS
input is low.
side output HO then goes high. The delay
8-10
If at any time after 7 has occurred and LS pin
5-7
between 3 and 4 is typically 30ns (T HOON ); this
allows for large turn off delay times of MOSFETs.
PWM goes low; HO goes low, typically within
45ns, t HOOFF . The switch node (HS pin) is then
monitored; when the switch node is VDD-2.5V
(V SWTH ) the high side MOSFET is deemed to be
off and the LO output goes high within typically
30ns (t LOON ). This is controlled by a one shot and
remains high until PWM goes high. This is
goes low, the LO output will turn off within 36ns
(V LSOFF ). HO will remain off. The LS pin
overrides all shoot through control logic. If LS is
low at the start of the next cycle when PWM
signal goes high then HO shall switch transition
1-4 as normal. I.e. PWM signal equals HO output,
LO = 0V.
November 2006
8
M9999-112806
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